-> Assume processing unit is ARM processor.
-> We have to code first C testcase for our intented operation .
-> Then we have to convert that C code into hex file with using simple tool related commands.
-> SOC TOP file will helps to load that hex files in to ARM.
-> so for loading that hex code into ARM ROM we can use verilog construct "READMEMH".
-> In readmemh we have to give hex file name and path or hierarchy of ARM ROM so it will load whole hex file in to ARM ROM.
-> And whatever we have given instruction in to C code that all instruction will fatch by ARM.
-> ARM will responds according the instructions in to the SOC.
-> We have to code first C testcase for our intented operation .
-> Then we have to convert that C code into hex file with using simple tool related commands.
-> SOC TOP file will helps to load that hex files in to ARM.
-> so for loading that hex code into ARM ROM we can use verilog construct "READMEMH".
-> In readmemh we have to give hex file name and path or hierarchy of ARM ROM so it will load whole hex file in to ARM ROM.
-> And whatever we have given instruction in to C code that all instruction will fatch by ARM.
-> ARM will responds according the instructions in to the SOC.
This not only applies to ARM but to any processor. The funda is simple. A processor is nothing but a complex peace of logic which can understand only binary a.k.a machine level language, while most of the coding which is used for application development and testing are prefered in high level languages like c, C++, java etc. The advantage of having a test or an application code in a high level languages facilitates portability and use of tools like visual studio for debugging, there by reducing the efforts of engineer and saving quite a lot of time.
ReplyDeleteOnce we have a code ready in high level language next is to convert it into machine level language. The tools like visual studio, gcc etc. only produce the executable binary or also known as elf. The resultant elf file is then converted into the machine level using an assembler provided/recommended by the processor vendor. The resultant binary image (produced by the vendors' tool) is then backdoor loaded into the instruction memory of SOC using the verilog "readmem" system tasks.